Yashwanth Hemaraj

From ITLWiki

Yashwanth Hemaraj

Yashwanth Hemaraj
Research Assistant focusing on Platform Acceleration
2005 B.E Electronics and Communication Engineering
at National Institute of Technology Karnataka, Suratkal, India



I am presently working as a research assistant at the Department of Diagnostic Radiolofy, School of Medicine, University of Maryland, Baltimore, MD. I am a graduate student at the Department of Electrical Engineering, Clark School of Engineering, College park, MD. I earned my B.E in Electronics and Communication Engineering from the National Institute of Technology Karnataka, Suratkal, India. For my masters research, I am working on Hardware acceleration of Image Registration algorithms. My interests lie in Optimal Implementation of DSP algorithms in hardware like programmable DSPs and FPGA and Hardware-Software co-design.

Masters Research

Hardware acceleration of Image Registration algorithms

I am working with Prof. Raj Shekhar in Radiology at UM's School of Medicine in Baltimore. I am working on acceleration of 3d elastic image registration algorithm on programmable hardware like FPGA. The system comprises of a FPGA processor with massive parallel and pipelined architecture. With this system we have been able to achieve a speed up of around 30 compared to the CPU only implementation. I have been working on parallel optimization techniques for faster convergence to the optimal solution and on multi-processor architectures for higher speedups.